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Insider Brief
- Iceberg Quantum and Diraq have demonstrated an implementation of Iceberg ’s Pinnacle qLDPC architecture on Diraq ’s spin-qubit hardware using NVIDIA CUDA-Q Logical.
- The companies report that Pinnacle can target 1,000 logical qubits with 150,000 physical qubits on Diraq ’s platform while maintaining its projected logical performance advantage.
- The work includes hardware mapping, shuttling-aware noise simulations and end-to-end compilation of logical primitives using CUDA-Q Logical.
PRESS RELEASE — Today we’re announcing work done by Iceberg Quantum and Diraq , leveraging early access to the newly announced Logical layer of the NVIDIA CUDA-Q platform. The work demonstrated how Iceberg Quantum’s Pinnacle architecture can be implemented on Diraq’s spin-qubit hardware platform while preserving Pinnacle’s logical performance advantage.
It is often assumed that quantum low-density parity-check (qLDPC) architectures such as Pinnacle require significantly more complex quantum hardware than surface code. This work shows that need not be the case. Pinnacle can be implemented on Diraq ‘s hardware without demanding significantly more of the platform than a standard surface code approach.
The result is that the first version of Pinnacle enables Diraq to achieve a target 1,000 logical qubits with just 150,000 physical qubits, as reported in Diraq’s white paper, `The Case for Silicon`. Future versions of Pinnacle will continue to boost the logical efficiency of Diraq’s devices further.
Mapping Pinnacle to Diraq’s Hardware
To establish this result, we embedded Pinnacle within Diraq ‘s hardware architecture. We specified how physical qubits should be allocated, identified the exact codes that would be used, and showed how to generate the required connectivity by shuttling qubits around the array. In short, everything you need to compile logical circuits on Pinnacle down to physical operations on hardware.
The key design challenge was implementing Pinnacle’s non-local connectivity while keeping shuttling distances small, since qubits accumulate errors as they are shuttled. Because Pinnacle is built from modular processing blocks, non-local connectivity is only ever needed within a block, never across the whole device. We then optimised the codes, circuits and shuttling schedules within each block so that shuttling contributes no more to the error budget than other sources, such as physical gates.
The result was that physical qubit counts from the Pinnacle paper agree with hardware-aware estimates on Diraq ‘s hardware to within a factor of 5%, and numerical simulations including shuttling-dependent noise verified logical performance suitable for useful quantum computing. The takeaway is that it is possible to implement Pinnacle on spin qubits whilst maintaining its low overhead and logical performance.
A Cross-stack Collaboration
NVIDIA CUDA-Q Logical allowed us to specify the full path from logical circuits in Pinnacle to physical operations on Diraq ‘s hardware. With this new layer in the CUDA-Q platform we were able to demonstrate end-to-end compilation of important logical primitives, such as adder circuits, down to the hardware level. The CUDA-Q platform can then also generate full-stack resource estimates for different combinations of logical algorithms and target devices, without rebuilding the compilation machinery.
“This work demonstrates that we can place the most advanced fault-tolerant error-correction technology on top of our hardware, increasing the projected logical performance of each device by an order of magnitude,” said Diraq ’s CEO and Founder, Andrew Dzurak. “It means that every improvement in fault tolerance from here has the potential to offer an improvement in what our devices can do.”
For Iceberg , this work marks an important step towards deploying Pinnacle on real hardware.
“We have successfully demonstrated that Pinnacle’s logical performance advantage is achievable on Diraq ’s hardware, and have carried the hardware mapping through to end-to-end compilation using NVIDIA CUDA-Q. CUDA-Q’s new logical layer gives us a flexible framework for expressing Pinnacle across distinct and evolving hardware platforms, without tightly coupling it to any one,” said Felix Thomsen, CEO and co-founder of Iceberg Quantum .
The work is an early demonstration of NVIDIA CUDA-Q Logical in use.
“Fault-tolerant quantum computing will advance faster when researchers can test new codes and architectures against real hardware constraints before the hardware is built,” said Sam Stanwyck, Director of Quantum Product at NVIDIA. “Using CUDA-Q Logical, Iceberg Quantum and Diraq showed that Pinnacle’s logical advantage carries through to a practical spin-qubit implementation, exactly the kind of rapid co-design needed to turn better ideas into useful quantum systems.”
Together, Iceberg and Diraq are leveraging NVIDIA’s quantum platform to forge a powerful cross-stack collaboration.