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Insider Brief
- IonQ researchers demonstrated that a MacBook Pro could decode simulated MegaQuOp-scale workloads involving up to 408 logical qubits and more than 1 million quantum operations.
- The decoding system added less than 0.3% to computation time at a two-qubit gate error rate of 0.01% and less than 12% at a 0.05% error rate.
- The arXiv study modeled IonQ ’s proposed trapped-ion architecture and did not test the decoder on an operating MegaQuOp quantum computer.
Your MacBook Pro may be powerful enough to one day manage error correction for a fault-tolerant quantum machine executing millions of operations, according to a new study from IonQ researchers .
The team, which included Min Ye, Andrii Maksymov and Nicolas Delfosse, all of IonQ , demonstrated an end-to-end decoding system for proposed trapped-ion quantum computers with as many as 408 error-corrected, or logical, qubits. The system processed simulated workloads containing more than 1 million demanding quantum operations while running on a single Apple M4 Max processor.
This places the test at the scale of a MegaQuOp machine, a proposed fault-tolerant quantum computer capable of performing roughly 1 million logical operations on error-corrected qubits. MegaQuOp describes the scale and reliability of the operations, rather than a particular type of quantum hardware.
Because MegaQuOp quantum computers do not exist yet, the decoder compiled representative quantum applications for a proposed fault-tolerant architecture and simulated the stream of error information that the hardware would produce, according to the study posted in the pre-print arXiv.
The results nevertheless address an important question about building large quantum computers. A fault-tolerant machine must not only protect quantum information but also interpret a constant stream of error signals quickly enough to keep the computation moving.
The IonQ system handled that task with relatively limited delays under the physical error rates and operating speeds assumed in the study. At a two-qubit gate error rate of 0.01%, decoding increased the length of the simulated computations by less than 0.3%. At an error rate of 0.05%, the added time remained below 12% across all three workloads.
What those results suggest overall is that — based on the tested assumptions — the decoder could keep pace with a fault-tolerant quantum computer without causing significant delays under the conditions tested.
Correcting Errors as the Machine Runs
In quantum computers, small disturbances — usually referred to as noise — can change the state of a qubit and corrupt a calculation. Quantum error correction seeks to control that problem by distributing information across groups of physical qubits.
Those physical qubits collectively form a more reliable qubit, termed a logical qubit. Measurements taken during a computation reveal patterns associated with errors without directly exposing the protected quantum information.
A decoder is the classical system that interprets those measurements. It estimates which errors occurred and tells the quantum computer how to account for them.
As machines become larger, managing these error-correction processes and systems become more challenging. A useful fault-tolerant quantum computer could generate error data from thousands or millions of physical qubits over millions of operating cycles. The decoder must process that information at approximately the same rate as the quantum hardware produces it.
If decoding falls behind, a backlog forms, which means quantum machine may then have to pause or add operating cycles while waiting for the classical system to catch up. In some fault-tolerant procedures, this can cause a quantum informational train wreck because the result of one logical measurement determines what the computer does next.
Much of the earlier decoding research cited in the paper concentrated on storing error-corrected quantum information or executing a limited number of logical operations. Other projects have used specialized hardware, including field-programmable gate arrays, graphics processors and custom chips, to accelerate decoding.
The IonQ researchers sought to test a more complete problem. Their pipeline covered memory, logical operations and the supporting processes required to run a universal fault-tolerant computation. It also generated updated error models while the simulated computation was underway.
The entire process ran on one standard CPU rather than a cluster or dedicated decoding device.
Testing Realistic Workloads
The study evaluated the decoder using IonQ ’s proposed “walking cat” architecture for fault-tolerant trapped-ion quantum computing. In that design, logical qubits are stored in quantum low-density parity-check codes — this is a family of error-correcting codes intended to protect more information with fewer physical qubits than some alternative approaches.
The architecture uses groups of physical qubits to hold logical information and separate “magic-state factories” to supply resources for certain operations. Magic states enable T gates, which are a basic quantum operation that helps a quantum computer perform complex calculations beyond those possible with simpler gates alone. T gates will be needed to one day perform general-purpose calculations.
Magic-state preparation is expected to consume a substantial share of the resources in many fault-tolerant computers. Making sure that factories were included in the decoder test made the benchmark more representative of a complete machine rather than an isolated quantum memory.
The largest configuration in the study used 68 memory blocks and 20 magic-state factories, representing 11,680 physical qubits and 408 logical qubits. That figure describes the modeled architecture, not an IonQ machine operating with more than 11,000 physical qubits.
The researchers report that they tested three compiled workloads. One modeled a measurement-induced phase transition, a quantum effect in which repeated measurements can change the pattern of entanglement within a system. The other two simulated versions of a disordered Heisenberg model, which is used to study the behavior of interacting quantum spins.
The measurement-induced phase-transition circuit used 102 logical qubits and included about 1.09 million T gates and 1.1 million logical measurements. A smaller Heisenberg workload used 102 logical qubits, nearly 140,000 T gates and more than 327,000 logical measurements.
The largest Heisenberg benchmark used 408 logical qubits, more than 555,000 T gates and about 1.32 million logical measurements.
Together, the benchmarks tested both the number of logical qubits and the length of the computation. This distinction matters because a decoder must cope with errors across the width of the machine while continuing to operate throughout a potentially long calculation.
All tests ran on a 2024 Apple M4 Max processor in a MacBook Pro. The researchers used 12 of its 16 CPU cores, assigning eight cores to continuous error decoding and four to decoding time-sensitive logical measurement results.
The timing measurements included both the decoding work and the generation of detector error models. These models describe how possible physical faults would appear in the measurements collected by the error-correction system.
The researchers developed a way to update those models without repeatedly rebuilding their underlying structure. The decoder kept a fixed mathematical graph and changed only the probabilities associated with particular errors as operations moved through the computation. That reduced the amount of work required during execution.
They also changed how the decoder stored information, cutting its memory requirements by more than an order of magnitude, according to the study. Lower memory use helped 12 decoding processes run concurrently without overwhelming the computer’s memory bandwidth.
Limitations and Next Steps
The team measured decoding performance in terms of “stretch,” or the additional error-correction cycles caused by decoding delays. A stretch of 1%, for example, means the machine would execute 1% more cycles than it would if decoding were instantaneous.
The two 102-logical-qubit workloads assumed that each syndrome-extraction cycle lasted 1 millisecond. Syndrome extraction is the repeated process of collecting information about potential errors. The 408-logical-qubit test assumed a 5-millisecond cycle, giving the same CPU more time to process error data from the larger number of blocks.
The researchers described 1 millisecond as a representative longer-term operating target for trapped-ion hardware and 5 milliseconds as a representative near-term figure. Trapped-ion systems generally operate more slowly than superconducting quantum processors, which gives the classical decoder more time to respond.
At the lowest tested two-qubit gate error rate, the added computation time ranged from 0.02% for the largest Heisenberg simulation to 0.24% for the measurement-induced phase-transition workload. At the highest error rate, the added time reached 11.53% for the measurement-induced phase-transition benchmark, 10.25% for the smaller Heisenberg test and 0.72% for the largest test.
The lower delay in the largest benchmark partly reflects its more generous 5-millisecond cycle assumption. It should not be read as evidence that a larger quantum computer is inherently easier to decode.
The work also applies specifically to the walking-cat architecture and its operating model. That design allows many logical operations to be tracked in software without physically merging or reshaping error-correcting blocks. Architectures built around different codes, gate methods or faster hardware cycles could impose heavier decoding requirements.
The benchmarks used a circuit-level noise model rather than error data from a large trapped-ion processor. Actual hardware may exhibit correlated noise, calibration changes and other behavior that is difficult to capture completely in simulation.
The researchers also reported that rare decoder convergence failures could occur when an error pattern became particularly difficult. A temporary delay merely extends the calculation, but a convergence failure would require the affected computation to restart. The study said these failures remained rare when the total computation was well below the inverse of the logical error rate per cycle.
Despite those limits, future work will likely examine how this classical decoding can scale so that it may not require exotic supporting hardware at the first MegaQuOp scale.
For a deeper, more technical dive, please review the paper on arXiv . It’s important to note that arXiv is a pre-print server, which allows researchers to receive quick feedback on their work. However, it is not — nor is this article, itself — official peer-review publications. Peer-review is an important step in the scientific process to verify results.